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? semiconductor components industries, llc, 1999 february, 2000 rev. 2 1 publication order number: mc34280/d !
the mc34280 is a power supply integrated circuit which provides two boost regulated outputs and some power management supervisory functions. both regulators apply pulsefrequencymodulation (pfm). the main stepup regulator output can be externally adjusted from 2.7v to 5v. an internal synchronous rectifier is used to ensure high efficiency (achieve 87%). the auxiliary regulator with a builtin power transistor can be configured to produce a wide range of positive voltage (can be used for lcd contrast voltage). this voltage can be adjusted from +5v to +25v by an external potentiometer; or by a microprocessor, digitally through a 6bit internal dac. the mc34280 has been designed for battery powered handheld products. with the low startup voltage from 1v and the low quiescent current (typical 35 m a); the mc34280 is best suited to operate from 1 to 2 aa/ aaa cell. moreover, supervisory functions such as low battery detection, cpu poweron reset, and backup battery control, are also included in the chip. it makes the mc34280 the best onechip power management solution for applications such as electronic organizers and pdas. features: ? low input voltage, 1v up ? low quiescent current in standby mode: 35 m a typical ? pfm and synchronous rectification to ensure high efficiency (87% @200ma load) ? adjustable main output: nominal 3.3v @ 200ma max, with 1.8v input ? auxiliary output voltage can be digitally controlled by microprocessor ? auxiliary output voltage: +5v @ 25ma max, with 1.8v input +25v @ 15ma max, with 1.8v input ? current limit protection ? poweron reset signal with programmable delay ? battery low detection ? lithium battery backup ? 32pin lqfp package applications: ? digital organizer and dictionary ? personal digital assistance (pda) ? dual output power supply (for mpu, logic, memory, lcd) ? handheld battery powered device (12 aa/aaa cell) 32lead lqfp ftb suffix case 873a http://onsemi.com device package shipping ordering information MC34280FTB lqfp 250 units/tray MC34280FTBr2 lqfp 1800 tape & reel marking diagram mc34280f awlyyww 1 32 a = assembly location wl = wafer lot yy = year ww = work week tb pin connections vauxen nc vauxbase vauxchg vauxfbn vauxref vmain vmainsw vmaingnd libaout nc libatin vauxemr vauxsw vauxfbp mc34280 lowbatsen dgnd prob lowbatb libaton libatcl vauxadj vauxcon vauxbdv vmainfb vbat enable vdd pdelay vref agnd iref 1 32
mc34280 http://onsemi.com 2 power on reset lithium battery backup voltage reference low battery detect current bias control and gate drive startup current limit main regulator with synchronous rectifier libatcl libaton lowbatb porb dgnd lowbatsen 14 13 12 11 10 9 gnd gnd rlbb r = 900 k rlba r = 300 k libatin 27 28 29 30 31 32 gnd n/c libatout vmaingnd vmainsw 1n5817 m2 m1 i ref agnd 87 v ref vbat gnd rmainb r = 1000 k cmainb c = 100p vbat vmain pdelay v dd v dd vmainfb vbat 65 4 v ref gnd gnd ren r = 1000 k vbat battery lock switch vmain gnd cvdd c = 20u 321 enable riref r = 480 k r123 r = 5 cmain c = 100u 10 v smt tantalum lmain l = 33u (rs < 60 mohm) gnd optional cmainbp c = 100u 10 v smt tantalum m3 d s d s d s gnd gnd figure 1. typical application block diagram cpor c = 80n vauxadj 15 vauxcon 16 vauxen 17 vbat libatcl libaton lowbat porb vauxadj vauxcon vauxen vauxfbp gnd optional cauxbp c = 100u 10 v smt tantalum vbat 18 20 21 19 22 23 24 level control current limit auxiliary regulator control and base drive laux l = 22u (rs < 60 mohm) vauxfbn gnd caux c = 30u 30 v smt tantalum vaux 1n5818 gnd gnd vauxref (1.1 v to 2.2 v) vauxbdv vauxchg vauxbase n/c rauxb r = 2.2 m rauxa r = 200 k gnd cauxb c = 2n cauxa c = 33n q1 vauxemr 26 vauxsw 25 optional
mc34280 http://onsemi.com 3 timing diagrams lowbatb vbat vmain enable porb lowbat threshold v mainreg 0.5 v vauxen porb vmain enable vbat t porc v mainreg 0.15 v v mainreg t por 1.22 0.5 c por riref figure 2. startup timing figure 3. power down timing
mc34280 http://onsemi.com 4 timing diagrams (con't) vauxcon vauxadj vauxref 1.1 v 2.2 v 1.65 v total n pulses total m pulses v n 64 1.1 v v m 64 1.1 v reset vauxref a countupo flag is low a countupo flag is high figure 4. auxiliary regulator voltage control t dw t rw t jw t jc t jl vauxcon vauxadj t cl t cw t cc t dl t rjl figure 5. auxiliary regulator voltage control timing
mc34280 http://onsemi.com 5 pin function description pin no. function type/direction description 1 vmainfb analog / input feedback pin for vmain 2 vbat power main battery supply 3 enable cmos / input chip enable, active high, enable activates vmain after battery plug in, enable is inactive after vmain is on 4 vdd analog / output connect to decoupling capacitor for internal logic supply 5 pdelay analog / input capacitor connection for defining poweron signal delay 6 vref analog / output bandgap reference output voltage. nominal voltage is 1.25v 7 agnd analog ground 8 iref analog / input resistor connection for defining internal current bias and pdelay current 9 lowbatsen analog / input resistive network connection for defining low battery detect threshold 10 dgnd digital ground 11 porb cmos / output active low poweron reset signal 12 lowbatb cmos / output active low low battery detect output 13 libaton cmos / input microprocessor control signal for lithium battery backup switch, the switch is on when libaton=high and libatcl=high 14 libatcl cmos / input microprocessor control signal for lithium battery backup switch, if it is high, the switch is controlled by libaton, otherwise, controlled by internal logic 15 vauxadj cmos / input microprocessor control signal for vaux voltage control 16 vauxcon cmos / input microprocessor control signal for vaux voltage control 17 vauxen cmos / input vaux enable, active high 18 vauxfbp analog / input feedback pin for vaux 19 vauxref analog / output reference voltage for vaux voltage level 20 vauxfbn analog / input feedback pin for vaux 21 vauxbdv power vaux bjt base drive circuit power supply 22 vauxchg analog / output test pin 23 vauxbase analog / output test pin 24 nc no connection 25 vauxsw analog / output collector output of the vaux power bjt 26 vauxemr analog / output emitter output of the vaux power bjt 27 libatin analog / input lithium battery input for backup purposes 28 libatout analog / output lithium battery output 29 nc no connection 30 vmaingnd power ground ground for vmain low side switch 31 vmainsw analog / input vmain inductor connection 32 vmain analog / output vmain output
mc34280 http://onsemi.com 6 absolute maximum ratings (t a = 25 c, unless otherwise noted.) parameter symbol min max unit power supply voltage v bat 0.3 7.0 vdc digital pin voltage v digital 0.3 7.0 vdc general analog pin voltage v analog 0.3 7.0 vdc pin vauxsw to pin vauxemr voltage (continuous) v auxce 0.3 30 vdc pin vmainsw to pin vmain voltage (continuous) v syn 0.3 vdc operating junction temperature t j (max) 150 c ambient operating temperature t a 0 70 c storage temperature t stg 50 150 c static electrical characteristics (circuit of figure 1, vp = 1.8v, i load = 0 ma, t a = 0 to 70 c unless otherwise noted.) rating symbol min typ max unit operating supply voltage 1 v bat 1.0 v vmain output voltage v main 3.13 3.3 3.47 v vmain output voltage range 2 v main_range 2.7 5.0 v vmain output current 3 i 3.3_1.8 200 ma vmain maximum switching frequency 4 freq max_vm 100 khz vmain peak coil static current limit i lim_vm 0.85 1.0 1.15 a vaux output voltage range vaux_range 5.0 25 v vauxref lower level voltage vaux ref_l 1.0 1.1 1.2 v vauxref upper level voltage vaux ref_h 2.0 2.2 2.4 v vauxref step size vaux ref_s 17 mv vaux maximum switching frequency freq max_vl 120 khz vaux peak coil static current limit i lim_vl 1.0 a quiescent supply current at standby mode 5 iq standby 35 60 m a reference voltage @ no load vref no_load 1.19 1.22 1.25 v battery low detect lower hysteresis threshold 6 v lobat_l 0.8 0.85 0.9 v battery low detect upper hysteresis threshold v lobat_h 1.05 1.1 1.15 v pdelay pin output charging current ichg pdelay 0.8 1.0 1.2 m a pdelay pin voltage threshold vth pdelay 1.19 1.22 1.25 v note: 1. output current capability is reduced with supply voltage due to decreased energy transfer. the supply voltage must not be hig her than vmain+0.6v to ensure boost operation. max startup loading is typically 1v at 400 m a, 1.8v at 4.4 ma, and 2.2v at 88 ma. note: 2. output voltage can be adjusted by external resistor to the vmainfb pin. note: 3. at vbat = 1.8v, output current capability increases with vbat. note: 4. only when current limit is not reached. note: 5. this is average current consumed by the ic from vdd, which is lowpass filtered from vmain, when only vmain is enabled and at no loading. note: 6. this is the minimum of olowbatbo threshold for battery voltage, the threshold can be increased by external resistor divider f rom ovbato to olowbatseno.
mc34280 http://onsemi.com 7 dynamic electrical characteristics (refer to timing diagrams , t a = 0 to 70 c unless otherwise noted.) rating symbol min typ max unit minimum porb to control delay t porc 500 ns minimum vauxcon pulse high width t cw 5.0 m s minimum vauxcon pulse low width t cc 8.0 m s minimum vauxadj to vauxcon delay t cl 1.0 m s minimum vauxadj pulse high width t jw 1.0 m s minimum vauxadj pulse low width t jc 1.0 m s minimum vauxcon low to vauxadj pulse delay 1 t jl 1.0 m s minimum hold time of vauxadj for reset vauxref t rjl 500 ns minimum vauxadj pulse high width for reset vauxref t rw 1.0 m s minimum hold time of vauxadj for decrement vauxref t dl 500 ns minimum vauxadj pulse high width for decrement vauxref t dw 1.0 m s note: 1. for not resetting vauxref. typical electrical characteristics 1 80% 1 90% 1 80% 0 90% v in , input voltage (v) v in , input voltage (v) eff vaux , efficiency of vaux ( % ) i out_aux , aux output current (ma) eff vmain , efficiency of vmain ( % ) figure 6. efficiency of vmain versus output current (vmain = 3.3 v, l = 33 uh, various v in ) i out_main , main output current (ma) figure 7. efficiency of vmain versus input voltage (vmain = 3.3 v, l1 = 33 uh, various i out ) figure 8. efficiency of vaux versus output current (vaux = 25 v, l2 = 33 uh, various v in ) figure 9. efficiency of vaux versus input voltage (vaux = 25 v, l2 = 33 uh, various i out ) 85% 80% 75% 70% 50 100 150 200 250 300 eff vmain , efficiency of vmain (%) 85% 80% 75% 70% 1.5 2 3 75% 70% 65% 60% 55% 50% 357 111315 75% 70% 65% 60% 55% 50% 1.5 2 2.5 3 eff vaux , efficiency of vaux (%) 2.5 9 v in = 3v v in = 1.8v v in = 1.5v v in = 1v i out = 10ma i out = 60ma i out = 100ma i out = 150ma i out = 200ma x x x x i out = 1ma i out = 5ma i out = 10ma i out = 15ma v in = 3v v in = 1.8v v in = 1.5v v in = 1v
mc34280 http://onsemi.com 8 typical electrical characteristics (cont'd) 1 80% 1 80% v in , input voltage (v) eff vaux , efficiency of vaux ( % ) i out_aux , aux output current (ma) figure 10. efficiency of vaux versus output current (vaux = 20 v, l2 = 33 uh, various v in ) figure 11. efficiency of vaux versus input voltage (vaux = 20 v, l2 = 33 uh, various i out ) 75% 70% 65% 60% 55% 50% 3 5 7 11 13 15 75% 70% 65% 60% 55% 50% 1.5 2 2.5 3 eff vaux , efficiency of vaux (%) 1 85% 1 65% v in , input voltage (v) eff vaux , efficiency of vaux (%) figure 12. efficiency of vaux versus output current (vaux = 5 v, l2 = 82 uh, various v in ) i out_aux , aux output current (ma) figure 13. efficiency of vaux versus input voltage (vaux = 5 v, l2 = 82 uh, various i out ) 85% 50% 45% 40% 5 1015 3035 75% 80% 50% 2 2.5 3 20 25 60% 55% 70% 80% 75% 70% 65% 1.5 eff vaux , efficiency of vaux (%) 9 v in = 3v v in = 1.8v v in = 1.5v v in = 1v i out = 1ma i out = 5ma i out = 10ma i out = 15ma v in = 3v v in = 2.4v v in = 1.8v v in = 1.5v v in = 1v i out = 1v i out = 5v i out = 10v i out = 15v i out = 25v
mc34280 http://onsemi.com 9 10 us / div 10 us / div 20 us / div 20 us / div figure 14. vmain output ripple (medium load) figure 15. vmain output ripple (heavy load) figure 16. vaux output ripple (medium load) figure 17. vaux output ripple (heavy load) 1: vmain = 3.3 v (50 mv/div, ac coupled) 2: voltage at vmainsw (1 v/div) 1: vmain = 3.3 v (50 mv/div, ac coupled) 2: voltage at vmainsw (1 v/div) 1: vaux = 20 v (50 mv/div, ac coupled) 2: voltage at vauxsw (10 v/div) 1: vaux = 20 v (50 mv/div, ac coupled) 2: voltage at vauxsw (10 v/div) 5 ms / div figure 18. vmain startup and poweron reset 50 ms / div figure 19. vaux startup 1: vmain from 1 v to 3.3 v (1 v/div) 2: voltage of porb (2 v/div) 3: voltage of enable (2 v/div) 1: vaux from 1.8 v to 20 v (5 v/div) 2: vauxen (2 v/div)
mc34280 http://onsemi.com 10 detailed operating description general the mc34280 is a power supply integrated circuit which provides two boost regulated outputs and some power management supervisory functions. both regulators apply pulsefrequencymodulation (pfm). the main boost regulator output can be externally adjusted from 2.7v to 5v. an internal synchronous rectifier is used to ensure high efficiency (achieve 87%). the auxiliary regulator with a builtin power transistor can be configured to produce a wide range of positive voltage (can be used to supply a lcd contrast voltage). this voltage can be adjusted from +5v to +25v by an external potentiometer; or by a microprocessor, digitally through a 6bit internal dac. the mc34280 has been designed for battery powered handheld products. with the low startup voltage from 1v and the low quiescent current (typical 35 m a); the mc34280 is best suited to operate from 1 to 2 aa/ aaa cell. moreover, supervisory functions such as low battery detection, cpu poweron reset, and backup battery control, are also included in the chip. it makes the mc34280 the best onechip power management solution for applications such as electronic organizers and pdas. pulse frequency modulation (pfm) both regulators apply pfm. with this switching scheme, every cycle is started as the feedback voltage is lower than the internal reference. this is normally performed by internal comparator. as cycle starts, lowside switch (i.e. m1 in figure 1) is turned on for a fixed on time duration (namely, t on ) unless current limit comparator senses coil current reaches its preset limit. in the latter case, m1 is off instantly. so t on is defined as the maximum on time of m1. when m1 is on, coil current ramps up so energy is being stored inside the coil. at the moment just after m1 is off, the synchronous rectifier (i.e. m2 in figure 1) or any rectification device (such as schottky diode of auxiliary regulator) is turned on to direct coil current to charge up the output bulk capacitor. provided that coil current is not reached, every switching cycle delivers fixed amount of energy to the bulk capacitor. so for higher loading, larger amount of energy (charge) is withdrawn from the bulk capacitor, and as output voltage is needed to regulated, larger amount of charge is needed to be supplied to the bulk capacitor, that means switching frequency is needed to be increased; and viceversa. main regulator figure 20 shows the simplified block diagram of main regulator. notice that precise bias current iref is generated by a vi converter and external resistor riref , where iref 0.5 riref (a) this bias current is used for all internal current bias as well as setting vmain value. for the latter application, iref is doubled and fed as current sink at pin 1. with external resistor rmainb tied from pin1 to pin32, a constant level shift is generated in between the two pins. in closeloop operation, voltage at pin 1 (i.e. output feedback voltage) is needed to be regulated at the internal reference voltage level, 1.22v. therefore, the delta voltage across pin 1 and pin 32 which can be adjusted by rmainb determines the main output voltage. if the feedback voltage drops below 1.22v, internal comparator sets switching cycle to start. so, vmain can be calculated as follows. vmain 1.22 rmainb riref (v) from the above equation, although vmain can be adjusted by rmainb and riref ratio, for setting vmain , it is suggested, by changing rmainb value with riref kept at 480k. since changing riref will alter internal bias current which will affect timing functions of max on time ( t on1 ) and min off time ( t off1 ). their relationships are as follows; t on 1 1.7 10 11 riref (s) t off 1 6.4 10 12 riref (s) continuous conduction mode and discontinuous conduction mode in figure 21, regulator is operating at continuous conduction mode. a switching cycle is started as the output feedback voltage drops below internal voltage reference vref. at that instant, the coil current does not drop to zero yet, and it starts to ramp up for the next cycle. as the coil current ramps up, loading makes the output voltage to decrease as the energy supply path to the output bulk capacitor is disconnected. and after t on elapsed, m1 is off, m2 becomes on, energy is dumped to the bulk capacitor. output voltage is increased as excessive charge is pumped in, then it is decreased after the coil current drops below the loading. notice the abrupt spike of output voltage is due to esr of the bulk capacitor. feedback voltage can be resistordivided down or levelshift down from the output voltage. as this feedback voltage drops below vref, next switching cycle starts.
mc34280 http://onsemi.com 11 detailed operating description (cont'd) figure 20. simplified block diagram of main regulator +ve edge delay r s q r s q qb 1shot vbat voltage reference main regulator with synchronous rectifier voltage reference & current bias agnd 1.22 v 0.5 v x2 riref 480 kohm vmainfb cmainb 100 pf vcomp for min. off time agnd ilim dgnd v dd rmainb 1000 kohm l1 33uh cmain 100 uf vmainsw vmaingn d dgnd v dd m1 m2 sensefet iref 2 x iref zlc for max. on time comp2 comp3 comp1 vmain + 30 32 31 1 8 iref in figure 22, regulator is operating at discontinuous conduction mode, waveforms are similar to those of figure 21. however, coil current drops to zero before next switching cycle starts. to estimate conduction mode, below equation can be used. iroom t on vin 2 2 l vout i load where, h is efficiency, refer to figure 6 if i room > 0, the regulator is at discontinuous conduction mode if i room = 0, the regulator is at critical conduction mode where coil current just drops to zero and next cycle starts. if i room < 0, the regulator is at continuous conduction mode for continuous conduction mode, provided that current limit is not reached, t sw t on 1 vin vout (s); i pk i load 1 t on t sw vin t on 2 l (a) for discontinuous conduction mode, provided that current limit is not reached, t sw vin t 2 on 2 l i load vout vin 1 (s); i pk vin l t on (a)
mc34280 http://onsemi.com 12 vmain zoomin v@sw vmain coil current loading current, i load 0 v vmain + 1 v t sw t on i pk vref feedback voltage m1 on m2 off m1 on m2 off m1 on m2 off m1 off m2 on m1 off m2 on m1 off m2 on cycle starts t dh t dl figure 21. waveforms of continuous conduction mode vmain zoomin v@sw vmain coil current loading current, i load vmain + 1 v t sw t on i pk vref feedback voltage m1 on m2 off m1 on m2 off m1 on m2 off m1 off m1 off m1 off cycle starts t dh t dl v in 0 v figure 22. waveforms of discontinuous conduction mode
mc34280 http://onsemi.com 13 detailed operating description (cont'd) synchronous rectification a synchronous rectifier is used in the main regulator to enhance efficiency. synchronous rectifier is normally realized by powerfet with gate control circuitry which, however, involved relative complicated timing concerns. in figure 20, as main switch m1 is being turned off, if the synchronous switch m2 is just turned on with m1 not being completed turned off, current will be shunt from the output bulk capacitor through m2 and m1 to ground. this power loss lowers overall efficiency. so a certain amount of dead time is introduced to make sure m1 is completely off before m2 is being turned on, this timing is indicated as t dh in figure 21. when the main regulator is operating in continuous mode, as m2 is being turned off, and m1 is just turned on with m2 not being completed off, the above mentioned situation will occur. so dead time is introduced to make sure m2 is completed off before m1 is being turned on, this is indicated as t dl in figure 21. when the main regulator is operating in discontinuous mode, as coil current is dropped to zero, m2 is supposed to be off. fail to do so, reverse current will flow from the output bulk capacitor through m2 and then the inductor to the battery input. it causes damage to the battery. so m2voltagedrop sensing comparator (comp3 of figure 20) comes with fixed offset voltage to switch m2 off before any reverse current builds up. however, if m2 is switch off too early, large residue coil current flows through the body diode of m2 and increases conduction loss. therefore, determination on the offset voltage is essential for optimum performance. auxiliary regulator the auxiliary regulator is a boost regulator, applies pfm scheme to enhance high efficiency and reduce quiescent current. an internal voltage comparator (comp1 of figure 23) detects when the voltage of pin vauxfbn drops below that of pin vauxfbp. the internal power bjt is then switched on for a fixedontime (or until the internal current limit is reached), and coil current is allowed to build up. as the bjt is switched off, coil current will flow through the external schottky diode to charge up the bulk capacitor. after a fixedmimimumoff time elapses, next switching cycle will start if the output of the voltage comparator is high. refer to figure 23, the vaux regulation level is determined by the equation as follows, v aux vauxfbp 1 r auxb r auxa (v) where max on time, ton2, and min off time, toff2 can be determined by the following equations. t on 2 1.7 10 11 riref (s) t off 2 2.1 10 12 riref (s) figure 23. simplified block diagram of auxiliary regulator +ve edge delay r s q qb 1shot for min. off time for max. on time agnd ilim comp2 cau x 33 u f + vbat l2 33uh input logic 6bit counter vauxcon vauxen vauxadj auxiliary level control auxiliary regulator 6bit 1.1 v 2.2 v 6 15 16 17 20 18 vbat 25 21 rauxb 2200 kohm rauxa 200 kohm vauxfbn vauxsw vauxbdv vauxfbp comp1 vcomp vauxemr 26 sensebjt q1 19 vauxref
mc34280 http://onsemi.com 14 detailed operating description (cont'd) auxiliary regulator (cont'd) as the auxiliary regulator control scheme is the same as the main regulator, equations for conduction mode, tsw and ipk can also be applied, however, to be used for caculation is refered to figure 8, 10, or 12. if external potentiometer is used for voltage level adjustment, internal 1.22v reference voltage can be used as shown in the application diagram of figure 24. current limit for both regulators from figure 20 and figure 23, sense devices (sensefet or sensebjt) are applied to sample coil current as the lowside switch is on. with that sample current flowing through a sense resistor, sensevoltage is developed. threshold detector (comp2 in both figures) detects whether the sensevoltage is higher than preset level. if it happens, detector output reset the flipflop to switch off lowside switch, and the switch can only be on as next cycle starts. figure 24. application diagram with external potentiometer for vaux adjustment 16 15 14 13 12 11 10 9 25 26 27 28 29 30 31 32 17 18 19 20 21 22 23 24 87654321 cmainb c = 100p rmainb r = 1000 k vbat vbat vref libatcl libaton lowbat porb vauxen gnd vbat vbat vaux gnd gnd rlbb r = 900 k rlba r = 300 k riref r = 480 k gnd gnd gnd gnd gnd gnd gnd cpor c = 80n cvdd c = 20u gnd mc34280 1n5818 1n5817 gnd lmain l = 33uh cmain c = 100u gnd gnd gnd caux c = 30u laux l = 33uh rauxa r = 200 k rauxb r = 2.2 m ren r = 1000 k
mc34280 http://onsemi.com 15 detailed operating description (cont'd) auxiliary voltage adjustment the vaux voltage can be adjusted by the microprocessor control signals, namely, vauxcon and vauxadj. the control signal pattern is shown in figure 4. the input truth table is shown in figure 25. when vauxen is low, the auxiliary regulator is shut down, only the counter content is retained. the initial counter content is midrange of 6bit. at the rising edge of vauxcon, if vauxadj is low (/ high), each following vauxadj pulse enclosed by the vauxcon pulse packet increments (/ decrements) the 6bit counter. at the falling edge of vauxcon, the counter content is then latched to a 6bit dac and is converted to a voltage level of vauxref between 1.1v and 2.2v. at the falling edge of vauxcon, if vauxadj is high, the counter content will be reset to midrange (1.65v). this is also the default setting just after poweron reset is removed. the 6bit dac converts the counter content to voltage level ranging from 1.1 to 2.2v, so there are altogether 64 levels, and each voltage step is 17mv. when the counter content reaches its maximum or minimum, further pulse of vauxadj will be disregarded, until counting direction is changed. poweron reset the poweron reset block accepts external active high enable signal to activate the ic after battery is plugged in. during the startup period (see figure 2), the internal startup circuitry is enabled to pump up vmain to a certain voltage level, which is the userdefined vmain output level minus an offset of 0.15v. the internal poweron reset signal is then disabled to activate the main regulator and conditionally the auxiliary regulator. meanwhile, the startup circuitry will be shut down. the poweron reset block also starts to charge up the external capacitor tied from pin pdelay to ground with precise constant current. as the pin pdelay's voltage reaches an internal set threshold, pin porb will go high to awake the microprocessor. and, t por 1.22 0.5 c por riref (s) from figure 3, if, by any chance, vmain is dropped below the userdefined vmain output level minus 0.5v, porb will go low to indicate the output low situation. and, the ic will continue to function until the vmain is dropped below 2v. lowbatterydetect the lowbatterydetect block is actually a voltage comparator. pin lowbat is low, if the voltage of external pin lowbatsen is lower than 0.85v internal reference. the ic will neglect this warning signal. pin lowbat will become high, if the voltage of external pin lowbatsen is recovered to more than 1.1v. from figure 1, with external resistors rlba and rlbb, thresholds of lowbatterydetect can be adjusted based on the equations below. v lobathigh 1.1 1 r lba r lbb (v) v lobatlow 0.85 1 r lba r lbb (v) vauxen vauxcon vauxadj result 0 x x hold the counter content 1 0 x hold the counter content 1 0 set ocountupo flag high 1 1 set ocountupo flag low 1 1 increment (/ decrement) the counter if ocountupo flag is high (/ low) 1 0 dac the counter content to vauxref voltage level (1.1 2.2 v) 1 1 reset the counter to midrange, then convert the counter content to vauxref voltage level (1.65v) figure 25. auxiliary voltage control input truth table
mc34280 http://onsemi.com 16 detailed operating description (cont'd) lithiumbattery backup the backup conduction path which is provided by an internal power switch (typ. 13 ohm) can be controlled by internal logic or microprocessor. if libatcl is low, the switch, which is then controlled by internal logic, is on when the battery is removed and vmain is dropped below libatin by more than 100mv, and returns off when the battery is plugged back in. if libatcl is high, the switch is controlled by microprocessor through libaton. the truth table is shown in figure 26. efficiency and output ripple for both regulators, when large values are used for feedback resistors (> 50kohm), stray capacitance of pin 1 (vmainfb) and pin 20 (vauxfbn) can add olago to the feedback response, destabilizing the regulator and creating a larger ripple at the output. from figure 1, ripple of main and aux regulator can be reduced by cmainb, cauxa and cauxb ranging from 100pf to 100nf respectively. reducing the ripple is also with improving efficiency, system designers are recommended to do experiments on capacitance values based on the pcb design. bypass capacitors if the metal leads from battery to coils are long, its stray resistance can put additional power loss to the system as ac current is being conducted. in that case, bypass capacitors (cmainbp and cauxbp of figure 1) are recommended to remove ac components of coil currents to minimize that power loss to optimize efficiency. libatcl libaton action 0 x the switch is on when the battery is removed and vmain is dropped below libatin by more than 100mv; the switch is off when the battery is plugged in. 1 0 the switch is off 1 1 the switch is on figure 26. lithium battery backup control truth table
mc34280 http://onsemi.com 17 package dimensions 32lead lqfp ftb suffix case 873a02 detail y a s1 v b 1 8 9 17 25 32 ae ae p detail y base n j d f metal section aeae g seating plane r q w k x 0.250 (0.010) gauge plane e c h detail ad notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. datum plane ab is located at bottom of lead and is coincident with the lead where the lead exits the plastic body at the bottom of the parting line. 4. datums t, u, and z to be determined at datum plane ab. 5. dimensions s and v to be determined at seating plane ac. 6. dimensions a and b do not include mold protrusion. allowable protrusion is 0.250 (0.010) per side. dimensions a and b do include mold mismatch and are determined at datum plane ab. 7. dimension d does not include dambar protrusion. dambar protrusion shall not cause the d dimension to exceed 0.520 (0.020). 8. minimum solder plate thickness shall be 0.0076 (0.0003). 9. exact shape of each corner may vary from depiction. dim a min max min max inches 7.000 bsc 0.276 bsc millimeters b 7.000 bsc 0.276 bsc c 1.400 1.600 0.055 0.063 d 0.300 0.450 0.012 0.018 e 1.350 1.450 0.053 0.057 f 0.300 0.400 0.012 0.016 g 0.800 bsc 0.031 bsc h 0.050 0.150 0.002 0.006 j 0.090 0.200 0.004 0.008 k 0.500 0.700 0.020 0.028 m 12 ref 12 ref n 0.090 0.160 0.004 0.006 p 0.400 bsc 0.016 bsc q 1 5 1 5 r 0.150 0.250 0.006 0.010 v 9.000 bsc 0.354 bsc v1 4.500 bsc 0.177 bsc detail ad a1 b1 v1 4x s 4x b1 3.500 bsc 0.138 bsc a1 3.500 bsc 0.138 bsc s 9.000 bsc 0.354 bsc s1 4.500 bsc 0.177 bsc w 0.200 ref 0.008 ref x 1.000 ref 0.039 ref 9 t z u tu 0.20 (0.008) z ac tu 0.20 (0.008) z ab 0.10 (0.004) ac ac ab m 8x t, u, z tu m 0.20 (0.008) z ac
mc34280 http://onsemi.com 18 notes
mc34280 http://onsemi.com 19 notes
mc34280 http://onsemi.com 20 on semiconductor and are trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to make changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. atypicalo parameters which may be provided in scill c data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. all operating parameters, including atypicalso must be validated for each customer application by customer's technical experts. scillc does not convey any license under its patent r ights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into t he body, or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. publication ordering information central/south america: spanish phone : 3033087143 (monfri 8:00am to 5:00pm mst) email : onlitspanish@hibbertco.com asia/pacific : ldc for on semiconductor asia support phone : 3036752121 (tuefri 9:00am to 1:00pm, hong kong time) toll free from hong kong & singapore: 00180044223781 email : onlitasia@hibbertco.com japan : on semiconductor, japan customer focus center 4321 nishigotanda, shinagawaku, tokyo, japan 1418549 phone : 81357402745 email : r14525@onsemi.com on semiconductor website : http://onsemi.com for additional information, please contact your local sales representative. mc34280/d north america literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 3036752175 or 8003443860 toll free usa/canada fax : 3036752176 or 8003443867 toll free usa/canada email : onlit@hibbertco.com fax response line: 3036752167 or 8003443810 toll free usa/canada n. american technical support : 8002829855 toll free usa/canada europe: ldc for on semiconductor european support german phone : (+1) 3033087140 (mf 1:00pm to 5:00pm munich time) email : onlitgerman@hibbertco.com french phone : (+1) 3033087141 (mf 1:00pm to 5:00pm toulouse time) email : onlitfrench@hibbertco.com english phone : (+1) 3033087142 (mf 12:00pm to 5:00pm uk time) email : onlit@hibbertco.com european tollfree access*: 0080044223781 *available from germany, france, italy, england, ireland

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